Interconnection networks (hereinafter also referred to as interconnection boards) are used for mounting and interconnecting electronic components in most commercial electronic equipment. The interconnection boards are generally made by either of two commonly used methods.
The most common method of manufacture is based on graphics technology wherein an image of the desired pattern is produced by mechanical or photographic printing techniques on the board surface and the actual conductors are made by a plating or an etching process, or a combination of such processes providing conductive paths.
The second type of interconnection board is made by one of the so-called discrete wiring processes. In these methods insulated wire is layed down on the board surface, usually by a point to point computer controlled program, to form the conductive pathways. The connections between terminal points and the conductive pathways may be made by mechanical deformation, soldering, or a metal plating process.
Interconnection boards may display one or more of the following defects:
a. Points of a conductor network which should be connected together have one (or more) discontinuities in the conductor path(s). This results in an "open circuit" condition with substantially infinite resistance between certain sections of the network.
b. Two independent conductor networks or conductor areas which are intended to have no electrical connection, and therefore, substantially infinite resistance between them, in fact, display an unacceptable, low value of resistance between the two networks commonly referred to as a "short circuit".
c. A conductive pathway is defective because it displays one or more sections having a resistance exceeding the acceptable level. This defect is referred to as a "resistive fault".
In an acceptable interconnection board the resistance between terminals of a common conductor network is normally in the range of from a few milliohms to a few ohms depending on the length and cross-section of the conductors. The resistance between independent networks should approach infinity, e.g., typically exceed 100 megohms.
The most common technique presently used for testing interconnection boards involves making resistance measurements between each terminal pair of each network of the board to verify the existence of a proper conductive path and, in addition, resistance measurements between a terminal of each network and a terminal of all the other networks to insure the absence of short circuits or unacceptable low resistance paths between networks. One of the disadvantages of this board testing concept is that it requires a very large number of individual measurements. For example, a board having 1000 networks and an average of 3 terminal points per network requires 499,500 tests for shorts and additional 2000 tests for opens and thus a total of 501,500 tests. Sequential measurements using moving probes are impractical with this technique because of the time needed for this large number of the test measurements and the complexity of the necessary probe movement control. Resistive measurements therefore are generally made using a special multicontact probe (known as a "bed of nails") providing contacts to each terminal point of the interconnection board being tested. With parallel contact of all of the terminals on the board at the same time, rapid electronic switching can be used to accomplish the individual measurements thereby substantially reducing the time required for testing an individual board. Such multicontact probes have to be custom made to match the terminal pattern of the interconnection board to be tested (e.g. the hole pattern in the case of boards with plated through holes) and, as such, are relatively time consuming to make and expensive. "Universal" bed of nails multicontact probes are also in use; such probes are not only very expensive, but require special adaptation tooling for each terminal pattern. Furthermore, with the trend toward interconnection board designs with increased terminal point densities, another disadvantage of the "bed of nails" concept consists in the high pressure that has to be applied to the multicontact probe fixture in order to achieve adequate individual contact pressure at each terminal point. For a contact force of only two ounces per contact, for example, a total force of 1250 pounds is required for testing an interconnection board with 10,000 terminals.
Another interconnection board testing technique which has been suggested in the past utilizes a movable probe for measuring capacitance between each terminal point and a common conductor plate. This technique is described in "Continuity Testing by Capacitance" by Robert W. Wedwick, published in Circuits Manufacturing, November 1974, pages 60 and 61 and in U.S. Pat. No. 3,975,680 issued to Larry J. Webb. This type of measurement, however, does not detect resistive faults in the conductor paths, and, therefore, does not provide complete test results suitable for assuring electrical integrity of the interconnection board being tested.
An object of the present invention is to provide a method and apparatus capable of completely testing an interconnection board which does not require a "bed of nails" or similar type multicontact probe.
Another object of the invention is to provide a method and apparatus for testing an interconnection board employing moving probes and sequential measurements and requiring only a limited number of test measurements.
Another object of the invention is to provide a method and apparatus which can operate on a "self learning" mode to develop criteria for accepting and rejecting boards.
Another object of the invention is to provide an apparatus and testing method capable of determining the signal transmission characteristics of the network interconnections.
Still another object of the invention is to provide a board testing method and apparatus which not only detects faults, but which is also capable of giving the location of faults on the board.